DocumentCode :
704095
Title :
FastTree: A hardware KD-tree construction acceleration engine for real-time ray tracing
Author :
Xingyu Liu ; Yangdong Deng ; Yufei Ni ; Zonghui Li
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fYear :
2015
fDate :
9-13 March 2015
Firstpage :
1595
Lastpage :
1598
Abstract :
The ray tracing algorithm is well-known for its ability to generate photo-realistic rendering effects. Recent years have witnessed a renewed momentum in pushing it to real-time for better user experience. Today the construction of acceleration structures, e.g., kd-tree, has become the bottleneck of ray tracing. A dedicated hardware architecture, FastTree, was proposed for kd-tree construction by adopting a fully parallel construction algorithm. FastTree was validated by an FPGA prototype and evaluated as an ASIC implementation. Experiment result shows FastTree outperforms existing hardware construction engines by a factor of nearly 4X at a similar area and power budget.
Keywords :
application specific integrated circuits; field programmable gate arrays; parallel algorithms; ray tracing; rendering (computer graphics); ASIC; FPGA prototype; FastTree; hardware KD-tree construction acceleration engine; hardware architecture; parallel construction algorithm; photo-realistic rendering effects; real-time ray tracing algorithm; Acceleration; Application specific integrated circuits; Engines; Field programmable gate arrays; Graphics; Hardware; Ray tracing; hardware acceleration; kd-tree; kd-tree construction; ray tracing; real-time ray tracing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
Conference_Location :
Grenoble
Print_ISBN :
978-3-9815-3704-8
Type :
conf
Filename :
7092647
Link To Document :
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