DocumentCode :
705729
Title :
A Full Symbolic Reachability Analysis Algorithm of Timed Automata Based on BDD
Author :
Huiping Zhang ; Junwei Du ; Ling Cao ; Guixin Zhu
Author_Institution :
Sch. of Inf. Sci. & Technol., Qingdao Univ. of Sci. & Technol., Qingdao, China
fYear :
2015
fDate :
25-27 March 2015
Firstpage :
301
Lastpage :
304
Abstract :
Reach ability analysis algorithm is the foundation of model checking. State space explosion is accelerated due to the time constraints of timed automata, therefore, the complexity of reach ability analysis algorithm has increased. The existing timed automata reach ability analysis methods can be divided into two types: the first type is the state space traversal algorithm based on equivalent time region map or difference bounded matrices (DBM) using a semi-symbol time constraints structure, the other is a state space traversal method based on BDD structure using full-symbol time constraints. Unfortunately, both types of methods split the symbol correlation of state transition expression and time constraints expression, therefore they are difficult to be applied into a large case study. A full-symbol reach ability analysis method based on BDD structure is proposed in this article, state transition space of timed automata and time constraints are expressed under the same BDD structure to avoid the loss of correlation and to analyze the reach ability of states and satisfiablity of time constraints. The presented method in this paper helps to achieve full-symbol reach ability analysis of timed automata, which would lay a solid foundation for full-symbolic model checking of time system. Finally, a specific case is analyzed by this algorithm.
Keywords :
automata theory; formal verification; reachability analysis; BDD; BDD structure; DBM; difference bounded matrices; full symbolic reachability analysis algorithm; full-symbol time constraints; full-symbolic model checking; model checking; semisymbol time constraints structure; state space explosion; state space traversal algorithm; state transition expression; time constraints; time constraints expression; time region map; timed automata; Algorithm design and analysis; Automata; Boolean functions; Data structures; Reachability analysis; Real-time systems; Time factors; BDD; full symbol analysis; reachability analysis; timed automata;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Autonomous Decentralized Systems (ISADS), 2015 IEEE Twelfth International Symposium on
Conference_Location :
Taichung
Print_ISBN :
978-1-4799-8260-8
Type :
conf
DOI :
10.1109/ISADS.2015.20
Filename :
7098276
Link To Document :
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