Wireless sensor network specific low power FIR filter design and implementation on FPGA

In this paper, we design energy efficient Finite Impulse Response (FIR) filter, which is widely used in wireless sensor networks as a signal pre-processing step because sensor nodes require a long working periods. Finite impulse response (FIR) filter is a type of digital filters. Response to a unit impulse is finite in FIR filter. FIR filter avoids the limitation of old parallel algorithm which take huge amount of hardware resources and its output as a weighted sum of its present and past input value. In this paper, wireless sensor network frequencies are used and obtain a maximum power reduction. It has been observed that the maximum total power reduction occurs in the case of wireless sensor network for scale down of frequency from 2.4 GHz to 16MHz. When it is operating with LVCMOS33, the maximum reduction is 1.252W. So, it is preferable to operate the circuit at the wireless frequency of 16MHz with respect to other wireless frequencies to make it more energy efficient.