• DocumentCode
    708214
  • Title

    Design and implementation of interleaved Vienna rectifier with greater than 99% efficiency

  • Author

    Qiong Wang ; Xuning Zhang ; Burgos, Rolando ; Boroyevich, Dushan ; White, Adam ; Kheraluwala, Mustansir

  • Author_Institution
    Center for Power Electron. Syst., Virginia Tech, Blacksburg, VA, USA
  • fYear
    2015
  • fDate
    15-19 March 2015
  • Firstpage
    72
  • Lastpage
    78
  • Abstract
    In this paper, the design and implementation of a 3 kW, three-phase, two-channel interleaved Vienna rectifier with greater than 99% efficiency is presented. The operation principle of an interleaved Vienna rectifier is introduced, with particular attention paid to the circulating current generated by interleaving operation. The design procedure for achieving maximum efficiency is described. Methods for loss calculation and hardware implementation involved in the optimization procedure are introduced. Finally, a prototype of the proposed converter is constructed, which achieves 99.08% efficiency at nominal load.
  • Keywords
    electric current control; optimisation; rectifiers; circulating current generation; design procedure; hardware implementation; interleaving operation; loss calculation; optimization procedure; three-phase interleaved Vienna rectifier; two-channel interleaved Vienna rectifier; Inductors; Logic gates; MOSFET; Rectifiers; Schottky diodes; Semiconductor device modeling; Switching loss;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Applied Power Electronics Conference and Exposition (APEC), 2015 IEEE
  • Conference_Location
    Charlotte, NC
  • Type

    conf

  • DOI
    10.1109/APEC.2015.7104334
  • Filename
    7104334