Title :
Employing an on-die test chip for maximizing parametric yields of 28nm parts
Author :
Mueller, Judith ; Jallepalli, Srinivas ; Mooraka, Ram ; Hector, Scott
Author_Institution :
Freescale Semicond., Austin, TX, USA
Abstract :
We show that a well designed suite of process observation structures (POSt) that can be tested on a standard production tester is a valuable asset for achieving high parametric yields. Our ability to tailor test coverage and conditions based on circuit yield signatures has allowed us to obtain the needed learning within a small test time budget.
Keywords :
integrated circuit testing; POSt; circuit yield signatures; on-die test chip; parametric yields; process observation structures; size 28 nm; standard production tester; Arrays; Current measurement; Monitoring; Periodic structures; Semiconductor device measurement; Semiconductor device modeling; Voltage control;
Conference_Titel :
Microelectronic Test Structures (ICMTS), 2015 International Conference on
Conference_Location :
Tempe, AZ
Print_ISBN :
978-1-4799-8302-5
DOI :
10.1109/ICMTS.2015.7106107
