DocumentCode :
708647
Title :
Development of a compacted doubly nesting array in Narrow Scribe Line aimed at detecting soft failures of interconnect via
Author :
Shinkawata, Hiroki ; Tsuboi, Nobuo ; Tsuda, Atsushi ; Sato, Shingo ; Yamaguchi, Yasuo
Author_Institution :
Production & Technol. Unit, Renesas Electron. Corp., Hitachinaka, Japan
fYear :
2015
fDate :
23-26 March 2015
Firstpage :
78
Lastpage :
81
Abstract :
We introduce a new addressable test structure array using for mass production stage which is compacted doubly nesting array into Narrow Scribe Line which named as High sensitivity-Screening and Detection-decoder test structure in Scribe line (HSD-S). Abnormally high resistance as a soft failure via was detected and located in a 40nm CMOS technology. We captured a soft failure bit which had a high resistance via exhibiting over 160 times larger one.
Keywords :
CMOS integrated circuits; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; vias; CMOS technology; addressable test structure array; compacted-doubly nesting array; high sensitivity-screening-detection-decoder test structure; interconnect via; mass production stage; narrow scribe line; size 40 nm; soft failure detection; Arrays; Compaction; Integrated circuit interconnections; Layout; Mass production; Monitoring; Reliability; Back End Of Line; Scribe line; array structure; interconnect via; soft failure; variability; yield;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures (ICMTS), 2015 International Conference on
Conference_Location :
Tempe, AZ
ISSN :
1071-9032
Print_ISBN :
978-1-4799-8302-5
Type :
conf
DOI :
10.1109/ICMTS.2015.7106112
Filename :
7106112
Link To Document :
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