DocumentCode :
709103
Title :
Synchronization concept for the characterization of integrated circuits with multi-gigabit receivers and a slow feedback channel
Author :
Schmidt, Martin ; Jianxiong Zhang ; Fohn, Thomas ; Grozing, Markus ; Berroth, Manfred
Author_Institution :
Inst. of Electr. & Opt. Commun. Eng., Univ. of Stuttgart, Stuttgart, Germany
fYear :
2015
fDate :
16-18 March 2015
Firstpage :
244
Lastpage :
247
Abstract :
This paper presents an off-line synchronization concept for the characterization of integrated circuits with receivers operating in the Gb/s range. The concept relies on the use of a programmable FPGA board with fast transmitters, a configurable delay board and an undersampling test register at the receiver side.
Keywords :
circuit feedback; delays; field programmable gate arrays; receivers; synchronisation; channels maximum relative delay; configurable delay board; integrated circuits characterization; multiGigabit receivers; off-line synchronization concept; programmable FPGA board; slow feedback channel; undersampling test register; Delays; Documentation; Field programmable gate arrays; Manuals; Receivers; Switches; System-on-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference (GeMiC), 2015 German
Conference_Location :
Nuremberg
Type :
conf
DOI :
10.1109/GEMIC.2015.7107799
Filename :
7107799
Link To Document :
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