DocumentCode
709638
Title
High-Volume-Manufacturing (HVM) of BVA enabled advanced Package-on-Package (PoP)
Author
Co, Rey ; Katkar, Rajesh ; Prabhu, Ashok S. ; Zohni, Wael
Author_Institution
Invensas Corp., San Jose, CA, USA
fYear
2015
fDate
14-17 April 2015
Firstpage
575
Lastpage
580
Abstract
Bond Via Array (BVA) technology utilizes existing wirebond assembly infrastructure to enable high density vertical interconnects required for next generation electronics products. One area that can benefit from BVA is Package-on-Package (PoP) for memory/processor and other combinations used in mobile electronics applications. PoP provides board space savings by vertically stacking the memory atop the processor package. The close coupling between the stacked components also facilitates reduced power operation. Recent product design trends have furthermore set forth requirements for increased IO count between memory and processor in order to increase bandwidth while reducing operating frequency. BVA enables assembly capability for achieving more than 1000 vertical connections between the memory and processor components in an industry standard PoP outline. This figure more than doubles current PoP assembly capability thereby addressing next generation high IO mobile device demands for increased bandwidth [1]-[3]. In this paper, we will present validation data for BVA high volume manufacturing including optimization of assembly process, yield, test and reliability.
Keywords
integrated circuit bonding; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; integrated circuit yield; lead bonding; three-dimensional integrated circuits; BVA; advanced package-on-package; assembly process optimization; bond via array technology; high density vertical interconnect; high volume manufacturing; integrated circuit reliability; integrated circuit testing; memory-processor component interconnection; wirebond assembly infrastructure; yield optimization; Assembly; Films; Memory management; Plasmas; Program processors; Strips; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging and iMAPS All Asia Conference (ICEP-IACC), 2015 International Conference on
Conference_Location
Kyoto
Print_ISBN
978-4-9040-9012-1
Type
conf
DOI
10.1109/ICEP-IAAC.2015.7111080
Filename
7111080
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