DocumentCode
709794
Title
Keynote Address 2: “Hybrid memory cube: Achieving high performance and high reliability”
Author
Keeth, Brent
fYear
2015
fDate
19-23 April 2015
Firstpage
1
Lastpage
1
Abstract
Summary form only given. This keynote presentation will explore the genesis, architecture and construction of the Hybrid Memory Cube. The presentation will open with a discussion on how both technical and market forces led to the creation of HMC. This will be followed by a dive into the Gen 2 HMC design-detailing the design goals for the device and how manufacturability was a priority from day one. 3D integration is pivotal technology for HMC. As such, it will be explored in the context of key enablers and ongoing challenges. Finally, the presentation will discuss how HMC encompasses a variety of RAS features to improve manufacturability and to ensure long term device reliability.
Keywords
integrated circuit design; integrated circuit reliability; random-access storage; three-dimensional integrated circuits; 3D integration; Gen 2 HMC design; RAS feature; hybrid memory cube; long term device reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium (IRPS), 2015 IEEE International
Conference_Location
Monterey, CA
Type
conf
DOI
10.1109/IRPS.2015.7112657
Filename
7112657
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