Intrinsic reliability of local interconnects for N7 and beyond

The intrinsic Time Dependent Dielectric Breakdown properties of the spacer between gate and first level local interconnects are assessed for dielectrics and spacings compatible with N7 and beyond. The intrinsic reliability properties down to 3nm thickness of standard LPCVD Si₃N₄- and PECVD Si₃N₄-films as well as more advanced Al₂O₃- and low-k CVD SiN-layers have been studied using imec´s pcap test vehicle. It turned out that the leakage current of the more advanced films are not worse compared to the more standard layers. Besides, their reliability performance, in terms of E_max, is the same or even slightly better. Down to 3nm thickness, E_max-values higher than 3.5MV/cm were obtained for all dielectrics studied. Fundamental insight in the breakdown processes is obtained by testing a wide thickness range (3-20nm) for the PECVD Si₃N₄-layer, where higher E_max and Q_BD were found for the thinner layers, suggesting that less damage is created by electrons when injecting them into thinner films (fluence driven failure mechanism). A difference in leakage and reliability when applying different polarities suggests different mechanisms playing a role when the electrons are injected from the interconnect or from the gate metal. Finally, field simulations at critical locations in the studied structure were used to assess places of higher local field enhancement. We found that at these places, the fields were still lower compared to the E_max-values of the intrinsic films, suggesting that scalability down to 3nm spacer thickness is intrinsically reliable.