Performance and reliability of strained SOI transistors for advanced planar FDSOI technology

Author

Besnard, G. ; Garros, X. ; Subirats, A. ; Andrieu, F. ; Federspiel, X. ; Rafik, M. ; Schwarzenbach, W. ; Reimbold, G. ; Faynot, O. ; Cristoloveanu, S.

Author_Institution

Parc Technol. des Fontaines, Chemin des Franques, Soitec, Bernin, France

fYear

2015

fDate

19-23 April 2015

Abstract

In this paper, we investigate the potential of strained Silicon-On-Insulator (sSOI) for the future advanced CMOS nodes. Strained FDSOI depicts a 30% higher performance in term of I_ON/I_OFF thanks to higher mobility. Changes in band structure reduce the gate leakage and devices depict superior HC reliability at same drive current. The better interface quality with sSi layer leads to higher immunity to dangling bonds generation. Strain integration does not affect BTI and breakdown reliability.

Keywords

CMOS integrated circuits; MOSFET; dangling bonds; integrated circuit reliability; silicon-on-insulator; advanced CMOS nodes; advanced planar FDSOI technology; dangling bonds generation; gate leakage; interface quality; reliability; strained SOI transistors; strained silicon-on-insulator; Degradation; Integrated circuit reliability; Performance evaluation; Silicon; Stress; Substrates; BTI; FDSOI; Hot Carrier; breakdown; reliability; sSOI; strained silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium (IRPS), 2015 IEEE International

Conference_Location

Monterey, CA

Type

conf

DOI

10.1109/IRPS.2015.7112691

Filename

7112691