Instabilities of SiC MOSFETs during use conditions and following bias temperature stress

We investigate lateral 4H-SiC MOSFETs after switches of the gate bias. We observe a small decrease of the drain current with a logarithmic time dependence which has the same root cause as positive bias temperature instability. The origin of these instabilities is the trapping of electrons into the gate oxide. By varying the device temperature we observe that the charge trapping is consistent with the kinetics of processes with distributed activation energies. The distribution has two distinct peaks where especially the low-energy peak is heavily affected by nitrogen post oxidation annealing.