• DocumentCode
    710399
  • Title

    Low-power IC design challenge

  • Author

    Cheng-Chih Mao

  • Author_Institution
    MediaTek, Hsinchu, Taiwan
  • fYear
    2015
  • fDate
    27-29 April 2015
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    Summary form only given. Green design becomes more important in these years. How to enhance the power efficiency is the mainstream of the SoC design. This work will talk about the challenges and possible solutions of each stage in the IC design flow, from the architecture level to the production level.
  • Keywords
    environmental factors; integrated circuit design; low-power electronics; system-on-chip; SoC design; green design; low-power IC design; Green design; Production; System-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, Automation and Test (VLSI-DAT), 2015 International Symposium on
  • Conference_Location
    Hsinchu
  • Type

    conf

  • DOI
    10.1109/VLSI-DAT.2015.7114563
  • Filename
    7114563
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=710399