An energy-efficient resilient flip-flop circuit with built-in timing-error detection and correction

This paper presents a timing error resilient flip-flop (ERFF) circuit with high energy-efficiency. The proposed flip-flop design automatically corrects timing errors and therefore minimizes the performance degradation due to variations. The simulation results show that the proposed design can achieve better energy-efficiency in ISCAS´89 benchmark circuits and LEON3 integer-processing unit, when compared to other state-of-the-art timing error detection and correction methods.