• DocumentCode
    710636
  • Title

    Innovative practices session 7C: Mixed signal test and debug

  • Author

    Natarajan, Suriya

  • Author_Institution
    Intel, USA
  • fYear
    2015
  • fDate
    27-29 April 2015
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    The traditional focus of work in test has been innovation and efficiency for high volume manufacturing test. However, in reality, a significant amount of effort is expended on design validation and debug prior to deeming analog and high speed serial IO test stimuli content production worthy. In this presentation we emphasize the importance of widening the post-silicon envelope to include early design validation and debug in addition to manufacturing test. The impact on DFX architecture is considered in which in order to be efficient the architecture has to be scalable across a wider set of post-silicon stages. We also discuss the need for establishing quick correlation between design validation and manufacturing test measurements and the time-to-market savings it brings for analog and IO content designed essentially on a digital process technology.
  • Keywords
    Calibration; Delays; Manufacturing; Mobile communication; Production; Safety; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium (VTS), 2015 IEEE 33rd
  • Conference_Location
    Napa, CA, USA
  • Type

    conf

  • DOI
    10.1109/VTS.2015.7116282
  • Filename
    7116282