• DocumentCode
    711023
  • Title

    Inserted-oxide FinFET (iFinFET) design to extend CMOS scaling

  • Author

    Peng Zheng ; Connelly, Daniel ; Fei Ding ; Tsu-Jae King Liu

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, Berkeley, CA, USA
  • fYear
    2015
  • fDate
    27-29 April 2015
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    A novel stacked MOSFET structure (iFinFET) is proposed to facilitate gate-length scaling to below 10 nm while mitigating the need to form very-high-aspect-ratio (>10:1 height:width) fin structures as for a stacked nanowire gate-all-around (GAA) MOSFET structure. Due to its superior electrostatic integrity, the iFinFET provides for higher performance and is more scalable than a conventional bulk FinFET.
  • Keywords
    CMOS integrated circuits; MOSFET; integrated circuit design; nanowires; CMOS scaling; GAA MOSFET structure; electrostatic integrity; gate-length scaling; iFinFET design; inserted-oxide FinFET; nanowire gate-all-around MOSFET structure; size 10 nm; stacked MOSFET structure; CMOS integrated circuits; FinFETs; Layout; Logic gates; Performance evaluation; Semiconductor process modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems and Application (VLSI-TSA), 2015 International Symposium on
  • Conference_Location
    Hsinchu
  • Type

    conf

  • DOI
    10.1109/VLSI-TSA.2015.7117573
  • Filename
    7117573
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=711023