DocumentCode
711036
Title
Analysis of monolithic 3D 6T SRAM using ultra-thin-body InGaAs/Ge MOSFETs considering interlayer coupling
Author
Kuan-Chin Yu ; Ming-Long Fan ; Pin Su ; Ching-Te Chuang
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2015
fDate
27-29 April 2015
Firstpage
1
Lastpage
2
Abstract
TCAD analysis results indicate that the cell robustness and performance of InGaAs-n/Ge-p 6T SRAM can be improved simultaneously with interlayer coupling through optimized monolithic 3D layout design. We suggest two layout designs for high performance and low power operation, respectively. Moreover, with optimized layout designs, InGaAs/Ge 6T SRAM exhibits larger Read access time and Time-to-Write improvement compared with Si-based counterparts.
Keywords
III-V semiconductors; MOS memory circuits; SRAM chips; elemental semiconductors; gallium arsenide; germanium; indium compounds; silicon; Ge; InGaAs; Si; TCAD analysis; interlayer coupling; monolithic 3D 6T SRAM; monolithic 3D layout design; read access time; time-to-write improvement; ultra-thin-body MOSFET; Couplings; Indium gallium arsenide; Layout; Random access memory; Silicon; Three-dimensional displays; Wireless sensor networks;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems and Application (VLSI-TSA), 2015 International Symposium on
Conference_Location
Hsinchu
Type
conf
DOI
10.1109/VLSI-TSA.2015.7117588
Filename
7117588
Link To Document