DocumentCode
711317
Title
Quad-core radiation-hardened system-on-chip power architecture processor
Author
Berger, Richard ; Chadwick, Steve ; Chan, Ernesto ; Ferguson, Richard ; Fleming, Patrick ; Gilliam, Jane ; Graziano, Michael ; Hanley, Mary ; Kelly, Andrew ; Lassa, Marla ; Bin Li ; Lapihuska, Robert ; Marshall, Joe ; Miller, Hugh ; Moser, Dave ; Pirkl, D
Author_Institution
Space Products & Process., BAE Syst., Inc., Manassas, VA, USA
fYear
2015
fDate
7-14 March 2015
Firstpage
1
Lastpage
12
Abstract
Based on the QorIQ® system-on-chip processor architecture from Freescale Semiconductor with additional unique features for space applications, the RAD55xxTM system-on-chip platform integrated circuit can be personalized into multiple processor solutions. The RAD55xx platform includes four 32/64 bit Power Architecture® processor cores, three levels of on-die cache memory, dual interleaved DDR3 DRAM controllers, data path acceleration architecture (DPAA) on-die hardware accelerators, a NAND Flash controller, and high I/O throughput based on serializer/deserializer high speed links. Manufactured at the IBM trusted foundry in 45nm silicon-on-insulator (SOI) process technology with copper interconnect and leveraging the radiation-hardened by design RH45TM technology, the RAD55xx platform optimizes power/performance to deliver processor throughput of up to 5.6 GOPS/3.7 GFLOPS, memory bandwidth of up to 102 Gb/s, and I/O throughput of up to 64 Gb/s. Each of the highly efficient RAD5500™ 64-bit cores offers direct addressability to 64 GB of memory, improves double precision floating point performance, and achieves 3.0 Dhrystone MIPS/MHz. The RAD55xx platform is designed for insertion into systems using the SpaceVPX standard, supporting the RapidIO data plane, SpaceWire control plane, and I2C utility plane. Architectural trades, the development methodology, technical challenges, and single board computer solutions are discussed.
Keywords
IBM computers; computer networks; copper; radiation hardening (electronics); silicon-on-insulator; system-on-chip; Cu; DPAA; I2C utility plane; IBM trusted foundry; NAND flash controller; QorlQ system-on-chip power processor architecture; RAD55xXTM system on-chip platform integrated circuit; RH45TM technology; RapidlO data plane; SOl process technology; Si; SpaceVPX standard; SpaceWire control plane; bit power architecture processor cores; data path acceleration architecture; development methodology; dual interleaved DDR3 DRAM controllers; floating point performance; freescale semiconductor; high I-O throughput; memory bandwidth; memory size 64 GByte; multiple processor solutions; on-die cache memory; on-die hardware accelerators; quad core radiation-hardened system-on-chip; serializer-deserializer high speed links; silicon-on-insulator; single board computer solutions; size 45 nm; space applications; Aerospace electronics; Biographies; Clocks; Electromagnetic compatibility; Flash memories; Random access memory; System-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Aerospace Conference, 2015 IEEE
Conference_Location
Big Sky, MT
Print_ISBN
978-1-4799-5379-0
Type
conf
DOI
10.1109/AERO.2015.7119114
Filename
7119114
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