Title :
On-board networks with radiation-hardened 45nm SOI standard components
Author :
Rickard, Dale ; Hutcheson, David ; Santee, Steven ; Pirkl, Dan ; Robertson, Jeffrey ; Stanley, Daniel ; Ross, Jason ; Hanley, Mary ; Trippe, Daniel ; Fleming, Patrick ; Livoti, James ; Nisar, Ashraf ; Robertazzi, Jeannine ; Federico, Jacob ; Lauper, Bryon
Author_Institution :
Space Products & Process., BAE Syst., Inc., Manassas, VA, USA
Abstract :
This paper describes the key components for implementing a modern network for intra-satellite communications at the backplane and spacecraft local area network (LAN) levels. The objective network is capable of supporting orders of magnitude more on-board processing than current architectures based on parallel PCI-bus, MIL-STD-1553B and SpaceWire alone. The RADNET™ family supports the emerging SpaceVPX standard at the backplane level including RapidIO data plane, SpaceWire control plane, and I2C utility plane. RapidIO, SpaceWire and MIL-STD- 1553B are the primary interfaces supported at the spacecraft local area network (LAN) level. Heritage network components are available to support parallel PCI-bus, SpaceWire and MIL-STD-1553B. The latest RADNET components use BAE System´s RH45™ radiation-hardened by design (RHBD) 45nm silicon-on-insulator (SOI) ASIC library and are manufactured at the IBM Trusted foundry. These include a RapidIO network endpoint, an 18-port, 192-Gb/s RapidIO packet switch, and a 16-by-16-lane, 5-Gbaud per lane physical layer serializer-deserializer (SerDes) crosspoint switch. Network architecture, technical challenges, component architectures, development methodology, implementation, programming and path to flight are discussed.
Keywords :
application specific integrated circuits; local area networks; peripheral interfaces; radiation hardening (electronics); satellite communication; silicon-on-insulator; space communication links; space vehicle electronics; BAE System RH45 radiation-hardened by design; I2C utility plane; LAN levels; MIL-STD- 553B; RADNET component family; RapidIO data plane; RapidIO packet switch; SOI ASIC library; SerDes crosspoint switch; SpaceVPX standard; SpaceWire control plane; bit rate 192 Gbit/s; component architectures; intra-satellite communications; network architecture; on-board networks; on-board processing; parallel PCI-bus; physical layer serializer-deserializer crosspoint switch; radiation-hardened SOI standard components; silicon-on-insulator ASIC library; size 45 nm; spacecraft local area network; Backplanes; Hardware; Military standards; Payloads; Software; Space vehicles;
Conference_Titel :
Aerospace Conference, 2015 IEEE
Conference_Location :
Big Sky, MT
Print_ISBN :
978-1-4799-5379-0
DOI :
10.1109/AERO.2015.7119241