Study about Si wafer (mother) material for high speed LPT-CSTBT™ based on electrical and physical analysis

In the IGBT as bipolar silicon power device, it is widely used a carrier lifetime control technique, i.e. an inducing a carrier trap level within the silicon band gap by an electron beam irradiation with a post thermal annealing. Sometimes, the electrical characteristics tend to change after the long term usage at high current density, because DC current stress of the high current density affects as if annealing out process at the high temperature. Hence it is necessary to eliminate several unstable shallow trap levels by thermal annealing in wafer process for maintaining the electrical characteristics stabilities. On the other hand, the trap levels originated in a very small amount of residual carbon (C) and/or oxygen (O) sometimes make the stabilities of electrical characteristics complicated. When we analyze this phenomenon, Photo-Luminescence (PL) is easy to grasp tendencies and is better than Cathode-Luminescence (CL). In this paper, through PL, we investigated silicon wafers of Floating Zone (FZ) and Magnetic Czochralski (MCZ) and studied the relationship between electrical characteristics and residual C &/or O in silicon mother materials which are the different of the diameter and/or the manufacturing methods.