Implementation of circuit in different adiabatic logic

Author

Chaudhuri, Arpan ; Saha, Mamia ; Bhowmik, Moumita ; Pradhan, Sambhu Nath ; Das, Subhrajit

Author_Institution

CAPGEMINI, Hyderabad, India

fYear

2015

fDate

26-27 Feb. 2015

Firstpage

353

Lastpage

359

Abstract

Adiabatic circuits are widely employed in Low power VLSI circuit to achieve power efficient system at the cost of reduced performance. The power saving of adiabatic circuit can reach more than 90% compared to conventional static CMOS logic for extreme low frequency applications. The power efficiency of 4:1 multiplexer, designed in different adiabatic logic families is presented in this paper. Power saving more than 50% is achievable beyond 1000MHz also.

Keywords

VLSI; logic circuits; low-power electronics; adiabatic logic families; extreme low frequency applications; low power VLSI circuit; multiplexer; power efficiency; power saving; static CMOS logic; CMOS integrated circuits; Capacitors; Clocks; Logic gates; MOSFET; Multiplexing; Power dissipation; 2N2P2N; CMOS; Efficient charge recovery logic; Low-power; Positive feed back adiabatic logic; adiabatic logic; multiplexer;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics and Communication Systems (ICECS), 2015 2nd International Conference on

Conference_Location

Coimbatore

Print_ISBN

978-1-4799-7224-1

Type

conf

DOI

10.1109/ECS.2015.7124923

Filename

7124923

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=713081