DocumentCode :
713590
Title :
Analog layout constraints resolution and shape function generation using Satisfiability Modulo Theories
Author :
Saif, Sherif M. ; Dessouky, Mohamed ; Abbas, Hazem ; El-Kharashi, M. Watheq ; Nassar, Salwa
Author_Institution :
Mentor Graphics Egypt, Cairo, Egypt
fYear :
2015
fDate :
21-23 April 2015
Firstpage :
1
Lastpage :
6
Abstract :
This paper exploits one of the formal methods to generate layouts for an analog circuit, where these layouts satisfy some given analog constraints. The analog constraints are provided by the user through a text file and the used method is the Satisfiability Modulo Theories solving. After generating the layouts as valid solutions for the given constraints, the paper shows how different aspect ratios can be used in order to draw the shape function. The shape function allows the user to find optimal layouts and accordingly select one of them, given some acceptable ranges for aspect ratios, width, and height.
Keywords :
analogue integrated circuits; function generators; integrated circuit layout; analog circuit layout constraint resolution; aspect ratios; formal methods; optimal layouts; satisfiability modulo theories; shape function; shape function generation; text file; Diffusion tensor imaging; Nanoscale devices; Radio frequency; World Wide Web; analog placement; aspect ratio; constraints; formal methods; layout; placement; shape function;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2015 10th International Conference on
Conference_Location :
Naples
Type :
conf
DOI :
10.1109/DTIS.2015.7127355
Filename :
7127355
Link To Document :
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