• DocumentCode
    713598
  • Title

    A concurrent BIST scheme for read only memories

  • Author

    Voyiatzis, I. ; Sgouropoulou, C. ; Efstathiou, C.

  • Author_Institution
    Dept. of Inf., TEI of Athens, Athens, Greece
  • fYear
    2015
  • fDate
    21-23 April 2015
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Input vector monitoring concurrent Built-In Self-Test (BIST) schemes perform testing during the normal operation of the circuit without imposing a need to set the circuit off-line in order to perform the test. In this work we present an input vector monitoring concurrent BIST scheme, specially designed for the testing of ROM modules.
  • Keywords
    built-in self test; integrated circuit testing; read-only storage; ROM module testing; concurrent BIST scheme; input vector monitoring concurrent built-in self-test scheme; read-only memories; Built-in self-test; Clocks; Decoding; Logic gates; Monitoring; Read only memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2015 10th International Conference on
  • Conference_Location
    Naples
  • Type

    conf

  • DOI
    10.1109/DTIS.2015.7127366
  • Filename
    7127366
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=713598