DocumentCode :
713707
Title :
Parallelized generation of ZC/ZC-DFT sequences in vector DSP
Author :
Jiangnan Lin ; Kai Xie ; Yongtao Su ; Yiqing Zhou ; Yanbin Yao ; Jinglin Shi
Author_Institution :
Wireless Commun. Technol. Res. Center, Inst. of Comput. Technol., Beijing, China
fYear :
2015
fDate :
9-12 March 2015
Firstpage :
621
Lastpage :
625
Abstract :
A parallelized generation of Zadoff-Chu (ZC) and the Discrete Fourier Transform of Zadoff-Chu (ZC-DFT) sequences is proposed. In this algorithm, the sampling operation is completely eliminated for the ZC-DFT sequences generation. Implemented on a vector Digital Signal Processor (DSP), the proposed algorithm makes an efficient use of the parallel DSP structure and achieves a high computing speed, owing to the decomposition of the root index. Since only a few “seed sequences” are required, the proposed algorithm obtains an extremely low memory requirement and a high precision.
Keywords :
digital signal processing chips; discrete Fourier transforms; signal processing; ZC-DFT sequences generation; Zadoff-Chu sequences; discrete Fourier transform; parallel DSP structure; parallelized generation; seed sequences; vector DSP; vector digital signal processor; Correlation; Digital signal processing; Discrete Fourier transforms; Indexes; Memory management; Parallel algorithms; Signal processing algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Communications and Networking Conference (WCNC), 2015 IEEE
Conference_Location :
New Orleans, LA
Type :
conf
DOI :
10.1109/WCNC.2015.7127541
Filename :
7127541
Link To Document :
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