DocumentCode :
714341
Title :
Improved standard cell synthesizable Digitally Controlled Oscillator
Author :
Balcioglu, Yalcin ; Dundar, Gunhan
Author_Institution :
Elektrik ve Elektron. Muhendisligi Bolumu, Bogazici Univ., İstanbul, Turkey
fYear :
2015
fDate :
16-19 May 2015
Firstpage :
355
Lastpage :
358
Abstract :
A novel Digitally Controlled Oscillator (DCO) architecture adjusting driving strength rather than capacitance for coarse and fine tuning in ring oscillator architectures has been proposed with full digital design flow as part of an effort to fully digitize All Digital Phase Locked Loops (ADPLL). Targeted for automotive wired applications, the design favors portability and flexibility first then area, power and noise performance.
Keywords :
oscillators; phase locked loops; ADPLL; all-digital phase locked loops; automotive wired application; digitally controlled oscillator architecture; driving strength; full-digital design flow; improved standard cell synthesizable DCO architecture; noise performance; ring oscillator architecture; CMOS integrated circuits; CMOS technology; Conferences; Oscillators; Phase locked loops; Solid state circuits; Standards; All Digital Phase Locked Loop; Digitally Controlled Oscillator;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing and Communications Applications Conference (SIU), 2015 23th
Conference_Location :
Malatya
Type :
conf
DOI :
10.1109/SIU.2015.7129832
Filename :
7129832
Link To Document :
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