DocumentCode :
714843
Title :
Development of multichannel real-time Hardware-in-the-Loop radar environment simulator for missile-borne Synthetic Aperture Radar
Author :
Ting Shu ; Bin Tang ; Kejun Yin ; Qingyang Sun ; Yangchun Chen ; Wenxian Yu
Author_Institution :
Shanghai Key Lab. of Intell. Sensing & Recognition, Shanghai Jiao Tong Univ., Shanghai, China
fYear :
2015
fDate :
10-15 May 2015
Abstract :
Radar target/environment simulators are usually developed for testing and evaluating various radar systems. In this paper, we present a novel implementation of real-time radar environment simulator with four channels for missile-borne Synthetic Aperture Radar (SAR). By using wideband Digital Radio Frequency Memory (DRFM) technique and parallel computing technique based on the Field Programmable Gate Array (FPGA), the simulator can provide real-time computation capability for raw SAR echo signal generation of extended scenes with a very small computational delay, which is essential for the missile-borne radar Hardware-in-the-Loop (HIL) simulation. Based on the multichannel and multi-DRFM architecture, the simulator is able to simultaneously generate multichannel SAR echo signals together with jamming signals. Moreover, the simulator is highly scalable and reconfigurable, and is able to meet a various kinds of radar simulation requirements.
Keywords :
field programmable gate arrays; jamming; military radar; missiles; radar signal processing; synthetic aperture radar; FPGA; computational delay; field programmable gate array; jamming signals; missile-borne SAR; missile-borne radar HIL simulation; missile-borne radar hardware-in-the-loop simulation; missile-borne synthetic aperture radar; multichannel SAR echo signal generation; multichannel multiDRFM architecture; multichannel real-time hardware-in-the-loop radar environment simulator; parallel computing technique; radar simulation requirement; radar systems; radar target-environment simulators; real-time computation capability; real-time radar environment simulator; wideband DRFM technique; wideband digital radio frequency memory technique; Convolution; Delays; Field programmable gate arrays; Real-time systems; Synthetic aperture radar; Wideband; DRFM; FPGA; missile-borne SAR; multichannel SAR echo signal simulator;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radar Conference (RadarCon), 2015 IEEE
Conference_Location :
Arlington, VA
Print_ISBN :
978-1-4799-8231-8
Type :
conf
DOI :
10.1109/RADAR.2015.7131026
Filename :
7131026
Link To Document :
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