Hardware in the loop (HIL) generation of airborne clutter using a sum of complex sinusoids technique

Author

Cilliers, J.E. ; McDonald, A.M. ; Strydom, J.J. ; van Wyk, M.A.

Author_Institution

Defence, Peace, Safety & Security (DPSS), Council for Sci. & Ind. Res. (CSIR), Tshwane, South Africa

fYear

2015

fDate

10-15 May 2015

Firstpage

1605

Lastpage

1609

Abstract

This paper describes the simulation of a non-symmetrical Doppler spectrum for an airborne radar scenario using a sum of complex sinusoids (SOC) technique. The low complexity generation of this class of spectrum is required for the generation of synthetic clutter for the testing of airborne radar systems using digital RF memory (DRFM) based hardware in the loop (HIL) test systems.

Keywords

airborne radar; radar clutter; DRFM-based hardware; HIL generation; HIL test systems; SOC technique; airborne clutter; airborne radar scenario; airborne radar systems; complexity generation; digital RF memory; hardware in the loop generation; nonsymmetrical Doppler spectrum; sum-of-complex sinusoid technique; synthetic clutter generation; Airborne radar; Clutter; Doppler effect; Radar clutter; Radar cross-sections; System-on-chip; DRFM; HIL; Hardware in the loop; RES; SOC; airborne clutter; airborne radar clutter Doppler spectrum; digitial RF memory; radar environment simulator; radar testing and evaluation; sum of cisoids; sum of complex sinusoids;

fLanguage

English

Publisher

ieee

Conference_Titel

Radar Conference (RadarCon), 2015 IEEE

Conference_Location

Arlington, VA

Print_ISBN

978-1-4799-8231-8

Type

conf

DOI

10.1109/RADAR.2015.7131254

Filename

7131254