Title :
A gate-oxide-breakdown antifuse OTP ROM array based on TSMC 90nm process
Author :
Zicheng Liu ; Ruifeng Zheng ; Jianwei Sun
Author_Institution :
Beijing Inst. of Technol., Beijing, China
Abstract :
A one-time programmable (OTP) antifuse ROM array using MOSFET gate oxide breakdown, which is designed and fabricated under TSMC 90nm standard CMOS process, is presented in this paper. The breakdown voltage and breakdown time are measured. The schematic design of three-transistor antifuse OTP ROM array is exhibited. SPI bus is used to decrease the number of chip pads in practice. The experimental result shows that write & read function can be realized successfully.
Keywords :
CMOS integrated circuits; MOSFET circuits; electric breakdown; read-only storage; CMOS process; MOSFET gate oxide breakdown; SPI bus; TSMC process; breakdown time; breakdown voltage; gate-oxide-breakdown antifuse OTP ROM array; one-time programmable antifuse ROM array; size 90 nm; three-transistor antifuse OTP ROM array; Arrays; Electric breakdown; Logic gates; Read only memory; Registers; Standards; Transistors; CMOS antifuse; OTP ROM; gate oxide breakdown;
Conference_Titel :
Next-Generation Electronics (ISNE), 2015 International Symposium on
Conference_Location :
Taipei
DOI :
10.1109/ISNE.2015.7132015
