Title :
A simplified space vector PWM algorithm for three-level NPC VSI
Author :
Chengzhu Piao ; Hung, John Y.
Author_Institution :
Dept. of Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA
Abstract :
This paper proposes a simplified space vector pulse width modulation (SVPWM) algorithm for three-level neutral point clamped (NPC) voltage source inverter (VSI). The waveform of sinusoidal pulse width modulation (SPWM) symmetric regular sampling is similar to the waveform of seven-segment SVPWM symmetric regular sampling. The only difference is that the two algorithms have different operation time of zero voltage vectors. Based on two-level inverter and the relationship between SVPWM and SPWM, a simplified SVPWM algorithm for three-level NPC VSI is developed. A zero-vector distribution variable k, which changes from zero to one, is introduced. On the basis of proposed algorithm, a simple neutral-point voltage balancing method is proposed. Compared with the conventional SVPWM algorithm, the simplified SVPWM algorithm can be more easily implemented in a digital device because the algorithm directly uses the instantaneous value of three phase reference voltages to calculate actual gating time for each inverter leg. The simulation results show that proposed method is valid and feasible.
Keywords :
PWM invertors; digital device; instantaneous value; inverter leg; seven-segment SVPWM symmetric regular sampling waveform; simple-neutral-point voltage balancing method; simplified SVPWM algorithm; simplified space vector PWM algorithm; simplified space vector pulse width modulation algorithm; sinusoidal pulse width modulation symmetric regular sampling waveform; three-level NPC VSI; three-level neutral point clamped voltage source inverter; three-phase reference voltages; two-level inverter; zero voltage vector operation time; zero-vector distribution variable; Inverters; Mathematical model; Phase modulation; Space vector pulse width modulation; Switches; modulation implicit function; neutral point voltage balance; simplified SVPWM; three-level VSI; zero voltage vector;
Conference_Titel :
SoutheastCon 2015
Conference_Location :
Fort Lauderdale, FL
DOI :
10.1109/SECON.2015.7132961