A practical approach for logic simplification based on fault acceptability for error tolerant application

In this paper, we focus on fault-acceptability-based logic simplification for error tolerant application. We propose a practical (or cost-effective) logic simplification algorithm. The proposed algorithm (1) avoids acceptability identification for faults that are potentially unacceptable and (2) isolates redundancy identification procedure from acceptability identification. Experimental results show that, compared with a previous algorithm, the proposed algorithm can reduce the computational effort without losing the ability of logic simplification.