Evaluating the self-testing property of AES´ finite field inversion units

Because the hardware realization of cryptographic systems is more and more attractive in terms of their performance, and since hardware implementations can be favorable adapted with self-testing techniques, in this paper we present a hardware offline error detection methodology protecting the Galois Field inversion modules of the Advanced Encryption Standard. The proposed test solution is built around the self-test capabilities of the field inverters when several units are linked together. The Units under Test are stimulated with pseudorandom test vectors, and the error detection mechanism is constructed as a conventional Built-In Self-Test. The AES inversion modules are stimulated with both exhaustive and deterministic test vectors and the correctness of the modules outputs is assessed by means of signature comparison. The error detection mechanism is validated in terms of the fault coverage when considering Single Stuck-at Faults.