• DocumentCode
    716996
  • Title

    Efficient and secure split manufacturing via obfuscated built-in self-authentication

  • Author

    Kan Xiao ; Forte, Domenic ; Tehranipoor, Mark Mohammed

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Connecticut, Storrs, CT, USA
  • fYear
    2015
  • fDate
    5-7 May 2015
  • Firstpage
    14
  • Lastpage
    19
  • Abstract
    The threats of reverse-engineering, IP piracy, and hardware Trojan insertion in the semiconductor supply chain are greater today than ever before. Split manufacturing has emerged as a viable approach to protect integrated circuits (ICs) fabricated in untrusted foundries, but has high cost and/or high performance overhead. Furthermore, split manufacturing cannot fully prevent untargeted hardware Trojan insertions. In this paper, we propose to insert additional functional circuitry called obfuscated built-in self-authentication (OBISA) in the chip layout with split manufacturing process, in order to prevent reverse-engineering and further prevent hardware Trojan insertion. Self-tests are performed to authenticate the trustworthiness of the OBISA circuitry. The OBISA circuit is connected to original design in order to increase the strength of obfuscation, thereby allowing a higher layer split and lower overall cost. Additional fan-outs are created in OBISA circuitry to improve obfuscation without losing testability. Our proposed gating mechanism and net selection method can ensure negligible overhead in terms of area, timing, and dynamic power. Experimental results demonstrate the effectiveness of the proposed technique in several benchmark circuits.
  • Keywords
    foundries; integrated circuit manufacture; integrated circuit reliability; invasive software; reverse engineering; supply chains; IP piracy; OBISA circuit; chip layout; hardware Trojan insertion; integrated circuits; obfuscated built-in self-authentication; reverse engineering; semiconductor supply chain; split manufacturing; trustworthiness; untrusted foundries; Delays; Fabrication; Foundries; Layout; Logic gates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Hardware Oriented Security and Trust (HOST), 2015 IEEE International Symposium on
  • Conference_Location
    Washington, DC
  • Type

    conf

  • DOI
    10.1109/HST.2015.7140229
  • Filename
    7140229