DocumentCode
718981
Title
[Title page i]
fYear
2015
fDate
11-13 May 2015
Abstract
The following topics are dealt with: Properties Extraction; Assertions Auto-generation; Clock Domain Imbalances; Test Architecture; SoC Designs; Satisfiability-Based Analysis; Radiation-Induced Errors; Reconfigurable Logic Fabrics; Complex Mixed-Signal Devices; At-Speed Path Delay Test; Failure Diagnosis; Compression Architectures; Multivalued Logic; and SoC Testing.
Keywords
computability; fault diagnosis; logic circuits; logic design; multivalued logic; system-on-chip; SoC designs; SoC testing; assertions auto-generation; at-speed path delay test; clock domain imbalances; complex mixed-signal devices; compression architectures; failure diagnosis; multivalued logic; properties extraction; radiation-induced errors; reconfigurable logic fabrics; satisfiability-based analysis; test architecture;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Workshop (NATW), 2015 IEEE 24th North Atlantic
Conference_Location
Johnson City, NY
Print_ISBN
978-1-4673-7416-3
Type
conf
DOI
10.1109/NATW.2015.1
Filename
7147639
Link To Document