• DocumentCode
    719522
  • Title

    A Bulk Planar SiGe Quantum-Well Based ZRAM with Low Vt Variability

  • Author

    Dutta, Sangya ; Mittal, Sushant ; Lodha, Saurabh ; Schulze, Jorg ; Ganguly, Udayan

  • Author_Institution
    Dept. of Electr. Eng., IIT Bombay, Mumbai, India
  • fYear
    2015
  • fDate
    17-20 May 2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A planar bulk ZRAM is attractive from a simplicity, cost and scalability perspective - compared to SOI or FinFET based designs. Alternatively, the highly doped p-channel bulk planar ZRAM with electrostatic potential well-based hole-storage is susceptible to random- dopant-fluctuation (RDF) induced VT variability. Here, we propose and evaluate a planar bulk ZRAM device with an intrinsic channel of Si/SiGe/Si hetero-structure epitaxially grown on an n+Si well. TCAD simulations show excellent performance of 660mV VT shift at +/-1.5V operation and IREAD difference of 45μA/μm. In terms of RDF based VT variability, a σVT of 12.8 mV is observed which is estimated to be a small fraction (~51×) of the estimate VT shift (660mV) and 6.47× lower compared to p-doped channel based ZRAM. Initial experiments on MOSCAP devices validate the hole-storage in the SiGe well with a 0.5V VT shift and an excellent read disturb (>1000s).
  • Keywords
    DRAM chips; Ge-Si alloys; electric potential; electrostatics; elemental semiconductors; epitaxial growth; semiconductor epitaxial layers; semiconductor growth; silicon; FinFET based designs; MOSCAP devices; RDF; SOI; Si; SiGe; TCAD simulations; bulk planar quantum-well based ZRAM; doped p-channel bulk planar ZRAM device; electrostatic potential well-based hole-storage; random-dopant-fluctuation induced voltage threshold variability; voltage 0.5 V; voltage 12.8 mV; voltage 660 mV; zero capacitor DRAM; FinFETs; Logic gates; Random access memory; Resource description framework; Semiconductor process modeling; Silicon; Silicon germanium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Memory Workshop (IMW), 2015 IEEE International
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    978-1-4673-6931-2
  • Type

    conf

  • DOI
    10.1109/IMW.2015.7150268
  • Filename
    7150268