DocumentCode
720569
Title
Programming Heterogeneous Systems with Array Types
Author
Xiang Cui ; Xiaowen Li ; Yifeng Chen
Author_Institution
HCST Key Lab., Peking Univ., Beijing, China
fYear
2015
fDate
4-7 May 2015
Firstpage
1067
Lastpage
1074
Abstract
This paper describes the use of array notation called Parray in refinement of parallel programs concerning array type that separates the physical data layout and logical structure of multi-dimensional data, and the control flow diversion of heterogeneous processor units. A case study on matrix multiplication demonstrates refinement of Parray programs: the code evolves from a simple single CPU-thread code to a multi-thread code on CPU/MIC and then a GPU code by modifying the array types in only a few lines of code. A GPU-based SGEMM is implemented in Parray and achieves almost the same Gflops of CUBLAS 4.0 when testing on a single node of Tian-1A system. Because the code operates directly on the logical structure of array, the same SGEMM code can work on different physical array data layouts.
Keywords
matrix multiplication; multi-threading; CPU-thread code; CPU/MIC; CUBLAS 4.0; GPU-based SGEMM; Parray programs; Tian-1A system; array notation; control flow diversion; heterogeneous processor units; heterogeneous system programming; logical multidimensional data structure; matrix multiplication; multithread code; parallel program refinement; physical data layout; Arrays; Graphics processing units; Instruction sets; Layout; Microwave integrated circuits; Process control; Programming; array type; heterogeneous programming; programming interface;
fLanguage
English
Publisher
ieee
Conference_Titel
Cluster, Cloud and Grid Computing (CCGrid), 2015 15th IEEE/ACM International Symposium on
Conference_Location
Shenzhen
Type
conf
DOI
10.1109/CCGrid.2015.113
Filename
7152593
Link To Document