DocumentCode
720744
Title
ESD gated diode SPICE compact model
Author
Zhenghao Gan ; An Zhang ; Waisum Wong ; Lifei Zhang ; Ye Haohua ; Chien-Lung Tseng
Author_Institution
Technol. R&D Center, Semicond. Manuf. Int. Corp., Shanghai, China
fYear
2015
fDate
15-16 March 2015
Firstpage
1
Lastpage
3
Abstract
A physics-based new gated diode SPICE compact model is provided considering the following two effects: (1) the leakage current under reverse bias of gated diode caused by the gate/diffusion overlap tunneling current; (2) the substrate conductivity modulation associated with high injection of carriers due to mobility saturation during high current transmission line pulse (TLP). The new SPICE model matches the silicon data under both ESD TLP and normal DC forward/reverse bias very well. The model is scalable in terms of finger width and number.
Keywords
electrostatic discharge; elemental semiconductors; leakage currents; semiconductor device models; semiconductor diodes; silicon; tunnelling; ESD gated diode; SPICE compact model; Si; TLP; carrier injection; gate-diffusion overlap tunneling current; leakage current; mobility saturation; normal DC forward-reverse bias; physics-based new gated diode; silicon data; substrate conductivity modulation; transmission line pulse; Data models; Electrostatic discharges; Fingers; Logic gates; SPICE; Semiconductor diodes; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Technology International Conference (CSTIC), 2015 China
Conference_Location
Shanghai
ISSN
2158-2297
Type
conf
DOI
10.1109/CSTIC.2015.7153319
Filename
7153319
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