PAM: An efficient power-aware multi-level cache policy to reduce energy consumption of Software Defined Network

Nowadays energy consumption is one of the most significant aspects in Internet operations, where multi-level routing is widely used. In a typical hierarchical router cache structure, the upper level storage serves as a cache for the lower level, which forms a distributed multi-level cache system. In the past two decades, several classic LRU-based multi-level cache policies were proposed to improve the overall I/O performance of storage systems. However, few power-aware multi-level cache policies focus on the storage devices in the bottom level, which consume more than 27% energy of the whole system [20]. To address this problem, in this paper, we propose a novel Power-Aware Multi-level cache (PAM) policy, which can reduce the energy consumption of storage devices with both high performance and high I/O bandwidth. In our PAM policy, a proper number of cold dirty blocks in the upper level cache are identified and selected to flush directly to the storage devices, which provides high probability to extend the duration time of data disks with standby status. Thus the energy consumption can be reduced. Simulation results show that, compared to the existing popular cache schemes such as PA-LRU, PB-LRU and Demote, PAM saves the power consumption by up to 15% under different I/O workloads, which improves the energy efficiency by up to 50.5%.