• DocumentCode
    723121
  • Title

    Development of very large Fan-In WLP/ WLCSP for volume production

  • Author

    Chatinho, Vitor ; Cardoso, Andre ; Campos, Jose ; Geraldes, Joel

  • Author_Institution
    NANIUM S.A., Vila do Conde, Portugal
  • fYear
    2015
  • fDate
    26-29 May 2015
  • Firstpage
    1096
  • Lastpage
    1101
  • Abstract
    WLCSP so far was used to enable low-cost manufacturing, and a high performance suitable for low I/O density for mobile and consumer products, wireless connectivity, MEMS and Sensors. Larger dies are usually packaged in Wirebond-BGA or FlipChip-BGA with a small bump pitch, applying underfill material between bumped die and FlipChip substrate to ensure the required board-level reliability. Typical Fan-In WLP/ WLCSP are ranging up to 8mm × 8mm in size, in some extreme cases up to 15mm × 15mm. Limits have been set by the board level reliability of larger chips/ packages, caused by the thermal mismatch between CSP (Chip Scale Package) and PWB (Printed Wiring Board). The paper describes the work done to overcome that limitation and develop, qualify and ramp in volume production a Fan-In WLP/ WLCSP solution beyond common practice. The WLCSP described is one order of magnitude larger in area, something which has never been accomplished in WLCSP before. Package construction and reliability test results will be presented. Daisy Chain Test vehicles have been used with different UBM diameter, UBM design, UBM thickness, dielectric material type, and solder ball alloy variants. All design options achieved minimum costumer requirement at TCoB, the most critical reliability test for such large device. With the right package design and construction, dielectric material and solder ball alloy selection, final product successfully passed more than 900 temperature cycles on board without fails. During the experiments is has been seen that number of cycles until first failure at TCoB and failure mode showed dependency on the above mentioned features.
  • Keywords
    chip scale packaging; integrated circuit reliability; printed circuits; PWB; chip scale package; daisy chain test; failure mode; package construction; printed wiring board; reliability test; very large fan-in WLCSP; very large fan-in WLP; volume production; Copper; Dielectrics; Reliability engineering; Stress; Vehicles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
  • Conference_Location
    San Diego, CA
  • Type

    conf

  • DOI
    10.1109/ECTC.2015.7159731
  • Filename
    7159731