DocumentCode :
723137
Title :
WLCSP CTE failure mitigation via solder sphere alloy
Author :
Nomura, Hikaru ; Tachibana, Ken ; Yoshikawa, Shunsaku ; Daily, Derek ; Kawa, Ayano
Author_Institution :
Senju Metal Ind. Co., Ltd., Tokyo, Japan
fYear :
2015
fDate :
26-29 May 2015
Firstpage :
1257
Lastpage :
1261
Abstract :
Extensive alloy composition development continues in order to optimize solder joint performance in electronic packaging and componentry. Although the general use tin, silver and copper, or “SAC”, alloy in the SAC305 composition remains most prevalent throughout the electronics industry, much work has been performed in order to improve upon lead free metallurgies specific to solder spheres. Challenges with device miniaturization and reliability have led to ever increasing alloy variant proliferation. The SAC305 alloy remains a viable solution for many applications. More recently, the packaging industry has moved to decrease silver content from 3.0% to 1.0~2.5% in order to enable greater bulk joint ductility, enhance sphere performance against drop shock type failures and reduce cost. As die sizes continue to expand, lose thickness and require packaging methods having greater complexity, new stresses are becoming apparent. WLCSP developments have driven changes in the package structure and layup. New under bump metallurgy (UBM) and passivation design have shown current alloys to be lacking in uniform reliability. This paper will focus on current research in solder sphere alloy development, with special focus on compositions intended to decrease failures prominent with CTE mismatch in wafer level chip scale packages. The paper will provide information related to the basic strategy for bulk alloy joint sphere structure optimization through solid solution strengthening and intermetallic compound (IMC) refining. Comparisons will be made between common alloys now in use and various modified compositions. The modified alloys will target improvements in high speed shear testing, solder wetting ability and drop testing capability, while maintaining thermal cycle performance similar to existing alloy technologies.
Keywords :
copper alloys; passivation; semiconductor device reliability; silver alloys; solders; thermal expansion; thermal management (packaging); tin alloys; wafer level packaging; IMC refining; SAC alloy; SAC305; SnAgCu; UBM; WLCSP CTE failure mitigation; alloy composition development; coefficient of thermal expansion; device miniaturization; device reliability; drop testing; electronic packaging; electronics industry; intermetallic compound refining; lead free metallurgy; passivation design; shear testing; solder joint; solder sphere alloy; solder wetting; thermal cycle performance; under bump metallurgy; wafer level chip scale packages; Bismuth; Compounds; Electric shock; Semiconductor device reliability; Substrates; CSP (Chip Scale Packaging); CTE (Coefficient of Thermal Expansion); IMC (Inter-Metallic Compound); NSMD (Non-Solder Mask Defined); SAC (Sn-Ag-Cu); SMD (Solder Mask Defined); SRO (Solder Resist Opening); UBM (Under Bump Metallurgy); WLCSP (Wafer Level Chip Scale Packaging);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
Conference_Location :
San Diego, CA
Type :
conf
DOI :
10.1109/ECTC.2015.7159758
Filename :
7159758
Link To Document :
بازگشت