Title :
Thermal modeling and experimental study of 3D stack package with hot spot consideration
Author :
Nakamura, Naoaki ; Iwakiri, Yoshihisa ; Onuki, Hiroshi ; Suwada, Makoto ; Kikuchi, Shunichi
Author_Institution :
Fujitsu Adv. Technol. Ltd., Kawasaki, Japan
Abstract :
This paper provides a unique approach to thermal modeling of BEOL (Back End Of Line) layers in a 3D stacked LSI and introduces a novel cold plate design method by using a 30 mm by 30 mm LSI as an example. The paper focuses on BEOL thermal characterization, flow rate control in branch-channels and the micro-channels behind them in a cold plate in accordance with a power map of the LSI, and an experimental setup for thermal verification. The power map had several considerable hot spots. The cold plate was able to considerably reduce temperature differences by 5°C all across the top surface of the LSI on the load condition of 120 W/cm2 for hot spots and 60.5 W/cm2 for other areas with regard to heat density, at a flow rate of 1 L/min. to the cold plate inlet. It also achieved a low of 5 kPa in pressure loss while the flow rate ratio of hot spots to others was controlled to approximately 5:1.
Keywords :
flow control; integrated circuit modelling; integrated circuit packaging; large scale integration; microchannel flow; thermal management (packaging); three-dimensional integrated circuits; 3D stack package; 3D stacked LSI; BEOL thermal characterization; back end of line layer; branch-channel; cold plate design method; flow rate control; heat density; hot spot consideration; large scale integration; load condition; microchannel; power map; pressure 5 kPa; pressure loss; temperature 5 C; temperature reduction; thermal modeling; thermal verification; Cold plates; Conductivity; Heating; Large scale integration; Thermal conductivity; Thermal resistance; Three-dimensional displays;
Conference_Titel :
Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
Conference_Location :
San Diego, CA
DOI :
10.1109/ECTC.2015.7159833