Title :
Low temperature, low pressure CMOS compatible Cu -Cu thermo-compression bonding with Ti passivation for 3D IC integration
Author :
Panigrahi, Asisa Kumar ; Bonam, Satish ; Ghosh, Tamal ; Vanjari, Siva Rama Krishna ; Singh, Shiv Govind
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol. Hyderabad, Yeddumailaram, India
Abstract :
In this paper, we report the methodology of achieving low temperature, low pressure CMOS compatible Wafer-on-Wafer (WoW) Cu-Cu thermo-compression bonding using optimally chosen ultra-thin layer of Titanium (Ti) as a passivation layer. We systematically studied the effects of Ti thickness on bonding quality via its effects on surface roughness, oxidation prevention and inter diffusion of Cu. Through this study, we have found that a Ti thickness of 3 nm not only results in excellent bonding but also leads to a reduction in operating pressure to 2.5 bar and temperature to 175° C. The reduction in pressure is more than an order of magnitude lower relative to the current state-of-the-art. The lower operating pressure and temperature manifest themselves in a very good homogenous bond further highlighting the efficacy of our approach. Finally, our results have been corroborated by evidence from AFM study of the Cu/Ti surface prior to bonding. The bond strength of Cu-Cu as measured by Instron Microtester measurement system is found to be 190 MPa which compares very well with the reported literatures.
Keywords :
CMOS integrated circuits; lead bonding; passivation; three-dimensional integrated circuits; wafer bonding; 3D IC integration; AFM study; CMOS compatible thermocompression bonding; Cu-Cu; Cu-Ti; bonding quality; low pressure thermocompression bonding; low temperature thermocompression bonding; passivation technique; pressure 190 MPa; pressure 2.5 bar; temperature 175 C; wafer-on-wafer thermocompression bonding; Bonding; Oxidation; Passivation; Rough surfaces; Surface contamination; Surface roughness;
Conference_Titel :
Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
Conference_Location :
San Diego, CA
DOI :
10.1109/ECTC.2015.7159909