• DocumentCode
    723431
  • Title

    Heterogeneity impact on MPSoC platforms performance

  • Author

    Frid, Nikolina ; Ivosevic, Danko ; Sruk, Vlado

  • Author_Institution
    Fac. of Electr. Eng. & Comput., Univ. of Zagreb, Zagreb, Croatia
  • fYear
    2015
  • fDate
    25-29 May 2015
  • Firstpage
    1071
  • Lastpage
    1076
  • Abstract
    Embedded systems have become an integral part of High Performance Computing (HPC) due to their appealing energy and resource consumption characteristics. Required performance goals can be achieved only by deploying the application on a heterogeneous platform. The established approach of designing a custom made FPGA architecture platform targeting particular application is challenged by novel multiprocessor heterogeneous platforms built using existing of-the-shelf embedded CPUs. The challenge is to exploit all the available parallelism and heterogeneity to design a time and cost efficient, but also a reusable solution which will meet the performance goals. In this paper the heterogeneity of parallel SoC system is evaluated through different processor cores and memory configurations usage examination. The design space exploration undertaken relies on several hypotheses concerning design concepts relations. Since system operating frequency is crucial, but not the only design performance success parameter, the importance of operating processor data path is emphasized as it conducts the application mapping approach. We show that, depending on the different heterogeneous elements configurations used within some multicore SoC solution, the suitability of particular processor cores usage varies on application type, but with achieved performance comparable to application-specific custom generated hardware.
  • Keywords
    embedded systems; field programmable gate arrays; logic design; multiprocessing systems; parallel processing; performance evaluation; system-on-chip; FPGA architecture platform; HPC; MPSoC platform performance; application mapping approach; application-specific custom generated hardware; design performance success parameter; design space exploration; embedded systems; heterogeneous platform; high-performance computing; memory configurations; multiprocessor heterogeneous platforms; of-the-shelf embedded CPU; operating processor data path; parallel SoC system heterogeneity; parallelism; processor cores; system operating frequency; Discrete cosine transforms; Field programmable gate arrays; Hardware; Multicore processing; Pipelines; Transform coding; Design Space Exploration; Embedded Computer Systems; FPGA; Heterogeneous Computing; High Level Synthesis; Software partitioning and mapping;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information and Communication Technology, Electronics and Microelectronics (MIPRO), 2015 38th International Convention on
  • Conference_Location
    Opatija
  • Type

    conf

  • DOI
    10.1109/MIPRO.2015.7160434
  • Filename
    7160434