DocumentCode :
724744
Title :
UPPAAL-based software-defined network verification
Author :
Podymov, Vladislav ; Popesko, Uliana
Author_Institution :
Fac. of Comput. Math. & Cybern., Lomonosov MSU, Moscow, Russia
fYear :
2013
fDate :
10-12 Oct. 2013
Firstpage :
9
Lastpage :
14
Abstract :
A lot of efforts were made in the last few years in the area of software-defined networks (SDN) - a special kind of computer networks in which the switching device control is fully centralized. This paper investigates the problems of formal description and verification of SDN as a real-time system. We provide a UML-based description of SDN, using the UML diagram editor Dia. To verify real-time properties of SDN, we use a well-known model-checking tool UPPAAL. The main result of the research is an approach for SDN verification, based on translation of SDN description into network of timed automata. Translation correctness is formalized and proved. A number of experiments were done to show that the approach can be used to verify real-time properties of SDN specified as TCTL formulae.
Keywords :
Unified Modeling Language; formal verification; real-time systems; software defined networking; SDN description; SDN verification; computer networks; formal description; formal verification; model checking tool UPPAAL; real-time system; software defined network verification; switching device control; timed automata network; Automata; Ports (Computers); Process control; Real-time systems; Switches; Unified modeling language; UPPAAL; software-defined networks; temporal logic; timed automata; verification;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Tools & Methods of Program Analysis (TMPA), 2013
Conference_Location :
Kostroma
Print_ISBN :
978-0-9860773-1-9
Type :
conf
DOI :
10.1109/TMPA.2013.7163715
Filename :
7163715
Link To Document :
بازگشت