• DocumentCode
    72534
  • Title

    New Modulation Scheme for Three-Level Active Neutral-Point-Clamped Converter With Loss and Stress Reduction

  • Author

    Yang Jiao ; Lee, Fred C.

  • Author_Institution
    Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
  • Volume
    62
  • Issue
    9
  • fYear
    2015
  • fDate
    Sept. 2015
  • Firstpage
    5468
  • Lastpage
    5479
  • Abstract
    This paper proposes a new modulation scheme for the three-level active neutral-point-clamped (ANPC) converter. This scheme yields new commutation loops for the three-level ANPC phase leg, which contain paralleled switching devices during commutation. The new commutation loops have better switching performance with smaller switching stress for some devices. There are also more evenly distributed loss and stress for each switching device on the phase leg. Moreover, the switching states of the new modulation scheme also reduce the conduction loss of the neutral current. In addition, the proposed modulation scheme needs less pulsewidth modulation (PWM) comparators per phase compared with the conventional scheme. The simple gate signal logic can be applied to any sinusoidal PWM or space vector modulation strategies. Double pulse tests for the new commutation loops show the improved switching characteristics under different load current cases. In addition, the quantitative analysis of the system loss breakdown and the phase leg loss distribution verifies the loss reduction and redistribution result. The proposed method is also applied on a 200-kW three-level ANPC converter for verification.
  • Keywords
    PWM power convertors; commutation; switching convertors; PWM comparators; commutation loops; conduction loss; double pulse tests; gate signal logic; load current; loss reduction; neutral current; paralleled switching devices; phase leg loss distribution; power 200 kW; pulsewidth modulation comparators; sinusoidal PWM; space vector modulation strategies; switching states; system loss breakdown; three-level ANPC converter; three-level ANPC phase leg; three-level active neutral-point-clamped converter; Logic gates; Phase modulation; Reactive power; Stress; Switches; Tin; Active neutral point clamp; Active neutral point clamped (ANPC); commutation loop; loss; switching status; switching stress;
  • fLanguage
    English
  • Journal_Title
    Industrial Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0046
  • Type

    jour

  • DOI
    10.1109/TIE.2015.2405505
  • Filename
    7045604