Surface orientation dependence of ion bombardment damage during plasma processing

Geometrical transition to three dimensional (3D) or Si nanowire (SNW) MOSFETs imposes critical issues regarding process technologies. High energy ion bombardment damage in 3D MOSFETs has been considered inevitable because of the fundamental nature of plasma process. In this study, we further investigated plasma-induced physical damage (PPD) on Si substrates with different surface orientations - (100), (111), and (110) to emulate PPD of future 3D and SNW devices. A classical molecular dynamics simulation implies that the channeling of incident ions is expected in a substrate with the (110) plane. However, spectroscopic ellipsometry identified thinner damaged layers in the case of (110) plane for higher ion energies (> 500 eV) and the pseudo-extinction coefficient k was smaller for the (110) plane. A capacitance-voltage measurement confirmed that the damaged layer consisted of SiO₂. Thus, the same Si loss leading to Si recess that degrades device performance is presumable on both of the planes. The present findings provide key guidelines for designing future SNW devices exposed to plasma.