• DocumentCode
    726337
  • Title

    Opportunistic Turbo Execution in NTC: Exploiting the paradigm shift in performance bottlenecks

  • Author

    Hu Chen ; Manzi, Dieudonne ; Roy, Sanghamitra ; Chakraborty, Koushik

  • Author_Institution
    Electr. & Comput. Eng., Utah State Univ., Logan, UT, USA
  • fYear
    2015
  • fDate
    8-12 June 2015
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    In this paper, we investigate an intriguing shifting trend in performance bottlenecks for Near-Threshold Computing (NTC) processors. Our study demonstrates that the traditional memory latency bottleneck is largely superseded by the bottlenecks of Long Latency Datapaths (LLDs) within a processor core. To exploit this paradigm shift, we propose Opportunistic Turbo Execution (OTE). OTE dynamically boosts the performance of LLDs, by several factors, improving both performance and energy efficiency in an NTC core. Using a comprehensive circuit-architectural analysis, we demonstrate a 42.2% improvement in energy efficiency over a recently proposed technique, across a range of benchmarks.
  • Keywords
    computer architecture; power aware computing; LLD; NTC; OTE; circuit-architectural analysis; energy efficiency; long latency datapaths; memory latency bottleneck; near-threshold computing; opportunistic turbo execution; paradigm shift; performance bottlenecks; Benchmark testing; Brain modeling; Control systems; Market research; Pipelines; Program processors; Sensitivity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE
  • Conference_Location
    San Francisco, CA
  • Type

    conf

  • DOI
    10.1145/2744769.2744881
  • Filename
    7167247