One-pass logic synthesis for graphene-based Pass-XNOR logic circuits

Electrostatically controlled graphene P-N junctions are devices built on a single layer graphene sheet that can be turned-ON/OFF via external potential difference. Their electrical behavior resembles a CMOS transmission gate with an embedded XNOR Boolean functionality. Recent works presented an efficient design style, the Pass-XNOR logic (PXL), which allows the implementation of adiabatic logic circuits with ultra low-power features. In this work we introduce Gemini, a one-pass logic synthesis methodology for PXL circuits. It consists of a dedicated XNOR-expansion algorithmthat combines logic optimization and technology mapping in a single step carried out through a common data structure, the Pass Diagram. Experimental results demonstrate (i) the superior of PXL circuits in terms of area and performance w.r.t. graphene circuits based on P-N junctions obtained using a CMOS-like synthesis/mapping methodology, and (ii) the power consumption in PXL circuits is governed by the adiabatic-charging principle which guarantees large power/energy savings w.r.t. non-adiabatic counterparts.