DocumentCode :
726411
Title :
Nanowire-aware routing considering high cut mask complexity
Author :
Yu-Hsuan Su ; Yao-Wen Chang
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2015
fDate :
8-12 June 2015
Firstpage :
1
Lastpage :
6
Abstract :
One-dimensional nanowires are one of the most promising next-generation lithography technologies for 7 nm process node and beyond. The 1D nanowire process first constructs a 1D nanoarray through template synthesis followed by line-end cutting with additional cut masks. To achieve better yield and manufacturability, the cut patterns shall satisfy specified restricted design rules, and thus it is desirable to develop a novel routing methodology to better address the challenges arising from cut patterns. In this paper, we propose the first nanowire-aware routing system, called NWR, considering high cut-mask complexity based on a two-pass, bottom-up multilevel routing framework. Experimental results show that our nanowire-aware router can effectively and efficiently reduce cut numbers, cut spacing violations, and line-end extension length.
Keywords :
masks; nanolithography; nanopatterning; nanowires; network routing; 1D nanoarray; 1D nanowire process; NWR; cut patterns; cut spacing violations; high cut mask complexity; line-end cutting; line-end extension length; multilevel routing framework; nanowire-aware router; nanowire-aware routing system; next-generation lithography technologies; routing methodology; size 7 nm; template synthesis; Force; Lithography; Nanowires; Pins; Routing; Tracking; Wires; Cut mask; Manufacturability; Nanowires; Routing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE
Conference_Location :
San Francisco, CA
Type :
conf
DOI :
10.1145/2744769.2744874
Filename :
7167324
Link To Document :
بازگشت