• DocumentCode
    726459
  • Title

    Layout-dependent-effects-aware analytical analog placement

  • Author

    Hung-Chih Ou ; Kai-Han Tseng ; Jhao-Yan Liu ; I-Peng Wu ; Yao-Wen Chang

  • Author_Institution
    Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • fYear
    2015
  • fDate
    8-12 June 2015
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Layout-dependent effects (LDEs) have become a critical issue in modern analog and mixed-signal circuit designs. The three major sources of LDEs, well proximity, length of oxide diffusion, and oxide-to-oxide spacing, significantly affect the threshold voltage and mobility of devices. In this paper, we propose the first work to consider the three major sources of LDEs during analog placement. We first transform the three LDE models into nonlinear analytical placement models. Then an LDE-aware analytical analog placement algorithm is presented to mitigate the influence of the LDEs while improving circuit performance. Experimental results show that our placement algorithm can effectively and efficiently reduce the LDE-induced variations and improve circuit performance.
  • Keywords
    integrated circuit layout; mixed analogue-digital integrated circuits; LDE-aware analytical analog placement algorithm; analog-signal circuit designs; layout-dependent-effects-aware; mixed-signal circuit designs; nonlinear analytical placement models; oxide diffusion length; oxide-to-oxide spacing; Algorithm design and analysis; Analog circuits; Analytical models; Circuit optimization; Routing; Stress; Threshold voltage; Analog ICs; Layout-Dependent Effects; Physical Design; Placement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE
  • Conference_Location
    San Francisco, CA
  • Type

    conf

  • DOI
    10.1145/2744769.2744865
  • Filename
    7167374