Droop method for high-capacity parallel inverters using virtual impedance

In this paper, the droop controlled parallel inverter systems with virtual inductor is considered under the unequal resistive-inductive combined line impedance condition which causes the reactive power sharing error. Here, the reactive power sharing error can be reduced by considering each line impedance voltage drop. But if the parallel inverter system is in high power level with large output current, the magnitude of reference output voltage becomes extremely lower than the rated voltage magnitude value because of the virtual inductance high voltage drop due to the multiplication with large output current. Hence, not only the line impedance voltage drop but also the virtual inductance voltage drop has been added to the conventional droop equation so that parallel inverters operate within the range of rated output voltage. Finally, the proposed droop method has been verified by comparing with conventional method through the PSIM simulation.